6#ifndef __ZEPHYR_RTOS_CACHE_H__
7#define __ZEPHYR_RTOS_CACHE_H__
9#define __SOF_LIB_CACHE_H__
11#if !defined(__ASSEMBLER__) && !defined(LINKER)
13#include <zephyr/cache.h>
14#include <zephyr/debug/sparse.h>
16#if defined(CONFIG_XTENSA) && defined(CONFIG_INTEL)
22#define SRAM_UNCACHED_ALIAS 0x20000000
23#define is_cached(address) (!!((uintptr_t)(address) & SRAM_UNCACHED_ALIAS))
28#if !defined(CONFIG_DCACHE_LINE_SIZE_DETECT) && (CONFIG_DCACHE_LINE_SIZE > 0)
29#define DCACHE_LINE_SIZE CONFIG_DCACHE_LINE_SIZE
31#if defined(CONFIG_LIBRARY) || defined(CONFIG_ZEPHYR_POSIX)
32#define DCACHE_LINE_SIZE 64
34#error "Invalid cache configuration."
59 sys_cache_data_flush_and_invd_range((
__sparse_force void *)addr, size);
static void dcache_writeback_invalidate_region(void __sparse_cache *addr, size_t size)
Definition cache.h:56
static void icache_invalidate_region(void __sparse_cache *addr, size_t size)
Definition cache.h:50
static void dcache_writeback_region(void __sparse_cache *addr, size_t size)
Definition cache.h:38
static void dcache_invalidate_region(void __sparse_cache *addr, size_t size)
Definition cache.h:44
#define __sparse_force
Definition compiler_attributes.h:12
#define __sparse_cache
Definition compiler_attributes.h:11