14#ifndef __SOF_LIB_CPU_H__
15#define __SOF_LIB_CPU_H__
25#define PLATFORM_PRIMARY_CORE_ID 0
27#if !defined(__ASSEMBLER__) && !defined(LINKER)
31#include <zephyr/arch/arch_inlines.h>
35#include <zephyr/pm/pm.h>
37void cpu_notify_state_entry(
enum pm_state state);
39void cpu_notify_state_exit(
enum pm_state state);
51#if defined(CONFIG_SOF_FULL_ZEPHYR_APPLICATION)
56#if CONFIG_MULTICORE && CONFIG_SMP
58#if defined(CONFIG_SOF_FULL_ZEPHYR_APPLICATION)
59static inline int z_impl_cpu_get_id(
void)
61 return arch_proc_id();
66 return arch_proc_id();
88void cpu_power_down_core(uint32_t flags);
95#if defined(CONFIG_SOF_FULL_ZEPHYR_APPLICATION)
96static inline int z_impl_cpu_get_id(
void) {
return 0; };
119#if defined(CONFIG_SOF_FULL_ZEPHYR_APPLICATION)
120#include <zephyr/syscalls/cpu.h>
static int cpu_is_core_enabled(int id)
Definition cpu.h:109
static void cpu_disable_core(int id)
Definition cpu.h:107
static bool cpu_is_me(int id)
Definition cpu.h:103
static int cpu_enabled_cores(void)
Definition cpu.h:111
#define PLATFORM_PRIMARY_CORE_ID
Id of primary DSP core.
Definition cpu.h:25
static int cpu_secondary_cores_prepare_d0ix(void)
Definition cpu.h:115
static bool cpu_is_primary(int id)
Definition cpu.h:101
static int cpu_restore_secondary_cores(void)
Definition cpu.h:113
static int cpu_enable_core(int id)
Definition cpu.h:105
static int cpu_get_id(void)
Definition cpu.h:98