CPU header file.
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◆ PLATFORM_PRIMARY_CORE_ID
| #define PLATFORM_PRIMARY_CORE_ID 0 |
Id of primary DSP core.
SOF IPC protocols make a distinction between primary and secondary cores. In Zephyr, primary core id concept is not present in public OS interface, but in implementation zero is the boot core (see z_smp_init() in Zephyr).
◆ cpu_disable_core()
| void cpu_disable_core |
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int | id | ) |
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◆ cpu_enable_core()
| int cpu_enable_core |
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int | id | ) |
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◆ cpu_enabled_cores()
| int cpu_enabled_cores |
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void | | ) |
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◆ cpu_get_id()
◆ cpu_is_core_enabled()
| int cpu_is_core_enabled |
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int | id | ) |
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◆ cpu_is_me()
◆ cpu_is_primary()
| bool cpu_is_primary |
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int | id | ) |
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◆ cpu_restore_secondary_cores()
| int cpu_restore_secondary_cores |
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void | | ) |
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◆ cpu_secondary_cores_prepare_d0ix()
| int cpu_secondary_cores_prepare_d0ix |
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void | | ) |
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