SRAM Window 0 firmware status registers and telemetry offset definitions. More...

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Macros
#define	SRAM_REG_FW_STATUS offsetof(struct ipc4_fw_registers, fsr)
	Offset to Firmware Status Register (FSR)

#define	SRAM_REG_LAST_ERROR_CODE offsetof(struct ipc4_fw_registers, lec)
	Offset to Last Error Code (LEC)

#define	SRAM_REG_FW_PWR_STATUS offsetof(struct ipc4_fw_registers, fps)
	Offset to Firmware Power Status (FPS)

#define	SRAM_REG_LNEC offsetof(struct ipc4_fw_registers, lnec)
	Offset to Last Native Error Code (LNEC)

#define	SRAM_REG_LTR offsetof(struct ipc4_fw_registers, ltr)
	Offset to Latency Tolerance Reporting (LTR)

#define	SRAM_REG_ROM_INFO offsetof(struct ipc4_fw_registers, rom_info)
	Offset to ROM bootstrap information.

#define	SRAM_REG_ABI_VER offsetof(struct ipc4_fw_registers, abi_ver)
	Offset to ABI version field.

#define	SRAM_REG_SLAVE_CORE_STS offsetof(struct ipc4_fw_registers, slave_core_sts)
	Offset to Secondary core power/run status.

#define	SRAM_REG_PIPELINE_REGS offsetof(struct ipc4_fw_registers, pipeline_regs)
	Offset to pipeline state register array.

#define	SRAM_REG_PEAK_VOL_REGS offsetof(struct ipc4_fw_registers, peak_vol_regs)
	Offset to peak volume meter register array.

#define	SRAM_REG_LLP_GPDMA_READING_SLOTS offsetof(struct ipc4_fw_registers, llp_gpdma_reading_slots)
	Offset to GPDMA linear link position reading slots.

#define	SRAM_REG_LLP_SNDW_READING_SLOTS offsetof(struct ipc4_fw_registers, llp_sndw_reading_slots)
	Offset to SoundWire link position reading slots.

#define	SRAM_REG_LLP_EVAD_SLOTS offsetof(struct ipc4_fw_registers, llp_evad_reading_slot)
	Offset to EVAD position reading slot.

#define	SRAM_REG_FW_END sizeof(struct ipc4_fw_registers)
	Total size boundary of Window 0 firmware register block.

Detailed Description

SRAM Window 0 firmware status registers and telemetry offset definitions.

Macros

Detailed Description