dai-intel.h

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/* SPDX-License-Identifier: BSD-3-Clause
 *
 * Copyright(c) 2018 Intel Corporation. All rights reserved.
 *
 * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 *         Keyon Jie <yang.jie@linux.intel.com>
 */

 
#ifndef __IPC_DAI_INTEL_H__
#define __IPC_DAI_INTEL_H__
 
#include <ipc/header.h>
#include <stdint.h>
 
 /* ssc1: TINTE */
#define SOF_DAI_INTEL_SSP_QUIRK_TINTE       (1 << 0)
 /* ssc1: PINTE */
#define SOF_DAI_INTEL_SSP_QUIRK_PINTE       (1 << 1)
 /* ssc2: SMTATF */
#define SOF_DAI_INTEL_SSP_QUIRK_SMTATF      (1 << 2)
 /* ssc2: MMRATF */
#define SOF_DAI_INTEL_SSP_QUIRK_MMRATF      (1 << 3)
 /* ssc2: PSPSTWFDFD */
#define SOF_DAI_INTEL_SSP_QUIRK_PSPSTWFDFD  (1 << 4)
 /* ssc2: PSPSRWFDFD */
#define SOF_DAI_INTEL_SSP_QUIRK_PSPSRWFDFD  (1 << 5)
/* ssc1: LBM */
#define SOF_DAI_INTEL_SSP_QUIRK_LBM     (1 << 6)
 
 /* here is the possibility to define others aux macros */
 
#define SOF_DAI_INTEL_SSP_FRAME_PULSE_WIDTH_MAX     38
#define SOF_DAI_INTEL_SSP_SLOT_PADDING_MAX      31
 
/* SSP clocks control settings
 *
 * Macros for clks_control field in sof_ipc_dai_ssp_params struct.
 */
 
/* mclk 0 disable */
#define SOF_DAI_INTEL_SSP_MCLK_0_DISABLE        BIT(0)
/* mclk 1 disable */
#define SOF_DAI_INTEL_SSP_MCLK_1_DISABLE        BIT(1)
/* mclk keep active */
#define SOF_DAI_INTEL_SSP_CLKCTRL_MCLK_KA       BIT(2)
/* bclk keep active */
#define SOF_DAI_INTEL_SSP_CLKCTRL_BCLK_KA       BIT(3)
/* fs keep active */
#define SOF_DAI_INTEL_SSP_CLKCTRL_FS_KA         BIT(4)
/* bclk idle */
#define SOF_DAI_INTEL_SSP_CLKCTRL_BCLK_IDLE_HIGH    BIT(5)
/* mclk early start */
#define SOF_DAI_INTEL_SSP_CLKCTRL_MCLK_ES       BIT(6)
/* bclk early start */
#define SOF_DAI_INTEL_SSP_CLKCTRL_BCLK_ES       BIT(7)
/* mclk always on */
#define SOF_DAI_INTEL_SSP_CLKCTRL_MCLK_AON      BIT(8)
 
/* DMIC max. four controllers for eight microphone channels */
#define SOF_DAI_INTEL_DMIC_NUM_CTRL         4
 
/* SSP Configuration Request - SOF_IPC_DAI_SSP_CONFIG */
struct sof_ipc_dai_ssp_params {
    uint32_t reserved0;
    uint16_t reserved1;
    uint16_t mclk_id;
 
    uint32_t mclk_rate; /* mclk frequency in Hz */
    uint32_t fsync_rate;    /* fsync frequency in Hz */
    uint32_t bclk_rate; /* bclk frequency in Hz */
 
    /* TDM */
    uint32_t tdm_slots;
    uint32_t rx_slots;
    uint32_t tx_slots;
 
    /* data */
    uint32_t sample_valid_bits;
    uint16_t tdm_slot_width;
    uint16_t reserved2; /* alignment */
 
    /* MCLK */
    uint32_t mclk_direction;
 
    uint16_t frame_pulse_width;
    uint16_t tdm_per_slot_padding_flag;
    uint32_t clks_control;
    uint32_t quirks;
    uint32_t bclk_delay;    /* guaranteed time (ms) for which BCLK
                 * will be driven, before sending data
                 */
} __attribute__((packed, aligned(4)));
 
/* HDA Configuration Request - SOF_IPC_DAI_HDA_CONFIG */
struct sof_ipc_dai_hda_params {
    uint32_t reserved0;
    uint32_t link_dma_ch;
    uint32_t rate;
    uint32_t channels;
} __attribute__((packed, aligned(4)));
 
/* ALH Configuration Request - SOF_IPC_DAI_ALH_CONFIG */
struct sof_ipc_dai_alh_params {
    uint32_t reserved0;
    uint32_t stream_id;
    uint32_t rate;
    uint32_t channels;
 
    /* reserved for future use */
    uint32_t reserved[13];
} __attribute__((packed, aligned(4)));
 
/* DMIC Configuration Request - SOF_IPC_DAI_DMIC_CONFIG */
 
/* This struct is defined per 2ch PDM controller available in the platform.
 * Normally it is sufficient to set the used microphone specific enables to 1
 * and keep other parameters as zero. The customizations are:
 *
 * 1. If a device mixes different microphones types with different polarity
 * and/or the absolute polarity matters the PCM signal from a microphone
 * can be inverted with the controls.
 *
 * 2. If the microphones in a stereo pair do not appear in captured stream
 * in desired order due to board schematics choises they can be swapped with
 * the clk_edge parameter.
 *
 * 3. If PDM bit errors are seen in capture (poor quality) the skew parameter
 * that delays the sampling time of data by half cycles of DMIC source clock
 * can be tried for improvement. However there is no guarantee for this to fix
 * data integrity problems.
 */
struct sof_ipc_dai_dmic_pdm_ctrl {
    uint32_t reserved0;
    uint16_t id;        
 
    uint16_t enable_mic_a;  
    uint16_t enable_mic_b;  
 
    uint16_t polarity_mic_a; 
    uint16_t polarity_mic_b; 
 
    uint16_t clk_edge;  
    uint16_t skew;      
 
    uint16_t reserved[3];   
} __attribute__((packed, aligned(4)));
 
/* This struct contains the global settings for all 2ch PDM controllers. The
 * version number used in configuration data is checked vs. version used by
 * device driver src/drivers/dmic.c need to match. It is incremented from
 * initial value 1 if updates done for the to driver would alter the operation
 * of the microphone.
 *
 * Note: The microphone clock (pdmclk_min, pdmclk_max, duty_min, duty_max)
 * parameters need to be set as defined in microphone data sheet. E.g. clock
 * range 1.0 - 3.2 MHz is usually supported microphones. Some microphones are
 * multi-mode capable and there may be denied mic clock frequencies between
 * the modes. In such case set the clock range limits of the desired mode to
 * avoid the driver to set clock to an illegal rate.
 *
 * The duty cycle could be set to 48-52% if not known. Generally these
 * parameters can be altered within data sheet specified limits to match
 * required audio application performance power.
 *
 * The microphone clock needs to be usually about 50-80 times the used audio
 * sample rate. With highest sample rates above 48 kHz this can relaxed
 * somewhat.
 *
 * The parameter wake_up_time describes how long time the microphone needs
 * for the data line to produce valid output from mic clock start. The driver
 * will mute the captured audio for the given time. The min_clock_on_time
 * parameter is used to prevent too short clock bursts to happen. The driver
 * will keep the clock active after capture stop if this time is not yet
 * met. The unit for both is microseconds (us). Exceed of 100 ms will be
 * treated as an error.
 */
 
struct sof_ipc_dai_dmic_params {
    uint32_t reserved0;
    uint32_t driver_ipc_version;    
 
    uint32_t pdmclk_min;    
    uint32_t pdmclk_max;    
 
    uint32_t fifo_fs;   
    uint32_t reserved_1;    
    uint16_t fifo_bits; 
    uint16_t fifo_bits_b;   
 
    uint16_t duty_min;  
    uint16_t duty_max;  
 
    uint32_t num_pdm_active; 
 
    uint32_t wake_up_time;      
    uint32_t min_clock_on_time; 
    uint32_t unmute_ramp_time;  
 
    /* reserved for future use */
    uint32_t reserved[5];

    struct sof_ipc_dai_dmic_pdm_ctrl pdm[SOF_DAI_INTEL_DMIC_NUM_CTRL];
} __attribute__((packed, aligned(4)));
 
#endif /* __IPC_DAI_INTEL_H__ */