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IPC4 Synchronous Serial Port (SSP / I2S) gateway and TDM configuration. More...

Include dependency graph for ssp.h:

Go to the source code of this file.

Data Structures

struct  ipc4_ssp_config
 Hardware register configuration values for Intel SSP/I2S controller. More...
 
struct  ipc4_ssp_mclk_config
 Master Clock (MCLK) divider hardware configuration. More...
 
struct  ipc4_ssp_driver_config
 Combined SSP hardware and clock configuration structure. More...
 
struct  ipc4_ssp_start_control
 SSP interface clock start control parameters. More...
 
struct  ipc4_ssp_stop_control
 SSP interface clock stop control parameters. More...
 
union  ipc4_ssp_dma_control
 SSP dynamic DMA and clock control union. More...
 
struct  ipc4_ssp_dma_control::ipc4_ssp_control
 Start and stop clock delay controls. More...
 
struct  ipc4_ssp_dma_control::ipc4_mn_div_config
 Fractional M/N clock divider settings. More...
 
struct  ipc4_ssp_configuration_blob
 Full SSP/I2S gateway configuration blob structure. More...
 

Macros

#define I2S_TDM_INVALID_SLOT_MAP1   0xF
 Invalid TDM slot mapping sentinel value.
 
#define I2S_TDM_MAX_CHANNEL_COUNT   8
 Maximum number of audio channels supported over SSP TDM.
 
#define I2S_TDM_MAX_SLOT_MAP_COUNT   8
 Maximum number of TDM slot mapping entries.
 

Detailed Description

IPC4 Synchronous Serial Port (SSP / I2S) gateway and TDM configuration.

NOTE: This ABI uses bit fields and is non portable.

Macro Definition Documentation

◆ I2S_TDM_INVALID_SLOT_MAP1

#define I2S_TDM_INVALID_SLOT_MAP1   0xF

Invalid TDM slot mapping sentinel value.

◆ I2S_TDM_MAX_CHANNEL_COUNT

#define I2S_TDM_MAX_CHANNEL_COUNT   8

Maximum number of audio channels supported over SSP TDM.

◆ I2S_TDM_MAX_SLOT_MAP_COUNT

#define I2S_TDM_MAX_SLOT_MAP_COUNT   8

Maximum number of TDM slot mapping entries.