Pipeline state transition command structure (SOF_IPC4_GLB_SET_PIPELINE_STATE). More...
#include <src/include/ipc4/pipeline.h>
Data Fields | ||
| union { | ||
| uint32_t dat | ||
| Raw 32-bit Primary register value. More... | ||
| struct { | ||
| uint32_t ppl_state: 16 | ||
| Target pipeline state (enum ipc4_pipeline_state). More... | ||
| uint32_t ppl_id: 8 | ||
| Target pipeline ID (ignored if multi_ppl == 1). More... | ||
| uint32_t type: 5 | ||
| Opcode: SOF_IPC4_GLB_SET_PIPELINE_STATE (19). More... | ||
| uint32_t rsp: 1 | ||
| Direction: 0 for request. More... | ||
| uint32_t msg_tgt: 1 | ||
| Target: 0 for global firmware message. More... | ||
| uint32_t _reserved_0: 1 | ||
| Reserved bit. More... | ||
| } r | ||
| } | primary | |
| union { | ||
| uint32_t dat | ||
| Raw 32-bit Extension register value. More... | ||
| struct { | ||
| uint32_t multi_ppl: 1 | ||
| 1 if additional pipeline IDs are provided in s_data payload. More... | ||
| uint32_t sync_stop_start: 1 | ||
| 1 if DSP should synchronize state transition across all pipelines. More... | ||
| uint32_t rsvd1: 28 | ||
| Reserved padding. More... | ||
| uint32_t _reserved_2: 2 | ||
| Reserved bits. More... | ||
| } r | ||
| } | extension | |
| struct ipc4_pipeline_set_state_data | s_data | |
| Optional multi-pipeline ID list. | ||
Detailed Description
Pipeline state transition command structure (SOF_IPC4_GLB_SET_PIPELINE_STATE).
Directs one or more pipelines to transition their operational state (e.g. RESET -> PAUSED -> RUNNING). For multi-pipeline audio chains, drivers must start pipelines in reverse topological order (from output gateway backwards to input) to prevent intermediate buffer overruns.
Field Documentation
◆ _reserved_0
| uint32_t ipc4_pipeline_set_state::_reserved_0 |
Reserved bit.
◆ _reserved_2
| uint32_t ipc4_pipeline_set_state::_reserved_2 |
Reserved bits.
◆ dat
| uint32_t ipc4_pipeline_set_state::dat |
Raw 32-bit Primary register value.
Raw 32-bit Extension register value.
◆ [union]
| union { ... } ipc4_pipeline_set_state::extension |
◆ msg_tgt
| uint32_t ipc4_pipeline_set_state::msg_tgt |
Target: 0 for global firmware message.
◆ multi_ppl
| uint32_t ipc4_pipeline_set_state::multi_ppl |
1 if additional pipeline IDs are provided in s_data payload.
◆ ppl_id
| uint32_t ipc4_pipeline_set_state::ppl_id |
Target pipeline ID (ignored if multi_ppl == 1).
◆ ppl_state
| uint32_t ipc4_pipeline_set_state::ppl_state |
Target pipeline state (enum ipc4_pipeline_state).
◆ [union]
| union { ... } ipc4_pipeline_set_state::primary |
◆ [struct] [1/2]
| struct { ... } ipc4_pipeline_set_state::r |
◆ [struct] [2/2]
| struct { ... } ipc4_pipeline_set_state::r |
◆ rsp
| uint32_t ipc4_pipeline_set_state::rsp |
Direction: 0 for request.
◆ rsvd1
| uint32_t ipc4_pipeline_set_state::rsvd1 |
Reserved padding.
◆ s_data
| struct ipc4_pipeline_set_state_data ipc4_pipeline_set_state::s_data |
Optional multi-pipeline ID list.
◆ sync_stop_start
| uint32_t ipc4_pipeline_set_state::sync_stop_start |
1 if DSP should synchronize state transition across all pipelines.
◆ type
| uint32_t ipc4_pipeline_set_state::type |
Opcode: SOF_IPC4_GLB_SET_PIPELINE_STATE (19).
The documentation for this struct was generated from the following file:
- src/include/ipc4/pipeline.h
