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Sound Open Firmware
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Sound Open Firmware (SOF) is an open-source, vendor-neutral audio Digital Signal Processing (DSP) firmware infrastructure, SDK, and real-time execution environment governed under the Linux Foundation.
SOF provides transparent, deterministic, low-latency audio processing for modern computing architectures ranging from client PCs and servers to embedded microcontrollers and IoT devices. It supports diverse hardware platforms including Intel (CAVS, ACE 1.x, ACE 2.x, ACE 3.x), AMD, NXP (i.MX8), MediaTek, Espressif (ESP32-P4), and PJRC (Teensy 4.1 / i.MX RT1062).
The firmware runs atop real-time operating systems (primarily Zephyr RTOS, with XTOS support on legacy platforms) and interfaces with host operating systems (Linux, ChromeOS, Android, Windows) via high-throughput Mailbox IPC protocols (IPC4 and IPC3) and DMA streaming windows.
The firmware codebase is organized into modular functional subsystems. Each subsystem exposes structured C APIs, data structures, and lifecycle interfaces:
| Subsystem | API Group | Key Headers & Interfaces | Description |
|---|---|---|---|
| Host-DSP IPC4 Protocol | IPC4 Host-DSP Protocol (IPC4 Message Envelope & Dispatch, IPC4 Pipeline Lifecycle & State Machine, IPC4 Module Architecture & Dynamic Binding, IPC4 Audio Formats & Pin Contracts, IPC4 Hardware Audio Gateways, IPC4 Base Firmware & Global Configuration, IPC4 Asynchronous Notifications & Telemetry Registers, IPC4 Telemetry, Logging & Audio Probes) | Modern Intel/AMD IPC4 messaging protocol: 64-bit mailbox envelope, base firmware configuration, dynamic module instantiation & binding, pipeline lifecycle state machines, hardware audio gateways, large parameter get/set fragmentation handshake, and asynchronous event notifications. | |
| Host-DSP IPC3 Protocol | IPC3 Host-DSP Protocol | Legacy IPC3 protocol structures, stream control envelopes, DAI/buffer tokens, and mixer controls. | |
| Pipeline Graph & Lifecycle | Pipeline Graph & Lifecycle Infrastructure | Audio pipeline Directed Acyclic Graph (DAG) construction, scheduling task binding (LL/DP), pipeline hierarchy traversal, and graph-wide state transitions. | |
| Component Infrastructure | Audio Component Infrastructure & Driver Model | Unified audio component driver model (comp_ops), trigger state machines, IPC module bindings, copy limits, and remote multi-core IDC communication. | |
| Audio Buffers & Streams | Audio Buffer & Stream Infrastructure | Interconnect buffers (comp_buffer), abstract audio buffers (sof_audio_buffer), circular stream endpoints, lockless ring buffers, and buffer transaction callbacks. | |
| Audio Formats & Routing | Audio Formats & Channel Routing | Channel mapping extraction, multi-channel spatial routing, and sample format saturation arithmetic. | |
| Scheduling Infrastructure | Scheduling Infrastructure | Multi-tiered real-time scheduling infrastructure: Low-Latency (LL) timer and DMA domains, Data Processing (DP) preemptible worker threads with dynamic deadline evaluation, Thread With Budget (TWB) cycle accounting, and core task state machines. | |
| Audio Processing Components & Modules | Audio Processing Components & Module Interface |
| Standard and dynamic DSP audio processing modules and component contracts: lifecycle callbacks (init, prepare, process, config), source/sink streaming endpoints, LLEXT dynamic loading, and module adapter glue. |
| Memory Management Infrastructure | Memory Management Infrastructure | Multi-tier DSP memory subsystem: system heaps (sys_heap), Virtual Memory Heap (VMH), pre-allocated virtual regions (vregion lifetime vs interim), cold DRAM dynamic staging (fast_get), shared user/kernel buffers, and data cache coherency. | |
| RTOS Abstraction Layer (RAL) | RTOS Abstraction Layer | Operating system abstraction bridging Zephyr RTOS and hardware primitives: spinlocks, mutexes, condition variables, hardware timers, cache writeback/invalidation, and multi-core Inter-Domain Communication (IDC). | |
| DSP Mathematics & Filters | DSP Math & Filter Libraries | Optimized DSP mathematics routines: fixed-point arithmetic (Q1.15, Q1.31), vector operations, fast Fourier transforms (FFT), window functions, biquad filter solvers, and SIMD accelerators. | |
| Telemetry, Logging & Probes | Telemetry, Logging & Probes | Real-time DSP firmware telemetry: non-blocking trace DMA logging, probe injection and extraction tap buffers, CPU load monitoring, MIPS benchmarking, and post-mortem crash dump mailboxes. | |
| Platform & Hardware Drivers | Platform & Hardware Drivers | Low-level peripheral drivers: Digital Audio Interfaces (I2S/SSP, SoundWire, DMIC/PDM, HDA), Direct Memory Access (DMA) controllers, interrupt controllers, and Power Management (D0ix/D3) runtime. |