Multicore Processing

Description

Sound Open Firmware implements multicore processing in the way, that the whole pipelines are executed on the selected core. Core selection is done by core field in struct sof_ipc_pipe_new during pipeline creation. Core value cannot exceed number of cores on current platform defined by PLATFORM_MAX_CORE_COUNT.

struct sof_ipc_pipe_new {
   struct sof_ipc_hdr hdr;
   uint32_t comp_id;
   uint32_t pipeline_id;
   uint32_t sched_id;
   uint32_t core;
   uint32_t deadline;
   uint32_t priority;
   uint32_t mips;
   uint32_t frames_per_sched;
   uint32_t xrun_limit_usecs;
   uint32_t timer;
} __attribute__((packed));

Core enablement

Cores are enabled and disabled by sending SOF_IPC_PM_CORE_ENABLE IPC with the right enable_mask. Core needs to be enabled before pipeline trigger start happens and disabled after pipeline trigger stop.

struct sof_ipc_pm_core_config {
   struct sof_ipc_hdr hdr;
   uint32_t enable_mask;
}

participant core0
participant core1
participant ipc
participant cpu
participant alloc
participant idc
participant init

core0 -> ipc : ipc_pm_core_enable(header)
   activate ipc

   ipc -> cpu : cpu_enable_core(core_id)
      activate cpu

      cpu -> alloc : alloc_core_context(core_id)
         activate alloc
      cpu <-- alloc
      deactivate alloc

      cpu -> idc : idc_enable_interrupts(core_id)
         activate idc
      cpu <-- idc
      cpu-> idc : arch_idc_send_msg(power_up, IDC_NON_BLOCKING)
      cpu <-- idc
      deactivate idc

   ipc <-- cpu
   deactivate cpu

core0 <-- ipc
deactivate ipc

core1 -> init : slave_core_init()
   activate init
init <-- core1
deactivate init

Note

Kernel also needs to enable cores on host side, before even sending SOF_IPC_PM_CORE_ENABLE IPC to FW.